1. Field of the Invention
The present invention relates to a capacity bank and a voltage-controlled oscillator having the same, capable of preventing phase noise degradation due to the FM modulation when common noise is introduced into the DC voltage of an oscillation node of the capacitor bank.
2. Description of the Related Art
As communication systems become increasingly complex, each single chip for a transceiver is generally designed with a voltage-controlled oscillator (VCO) that supports both multi-band communication and the use of multi-mode. A transceiver integrated circuit (IC) for mobile communication requires the VCO to operate over a wide frequency bandwidth. The VCO may include an active circuit, an LC tank and a capacitor bank.
FIG. 1 is a circuit diagram illustrating a conventional capacitor bank using a metal-insulator-metal (MIM) capacitor.
Since the MIM capacitors C1 to Cn are used in the capacitor bank in FIG. 1, common noise introduced to a terminal A or terminal B may not affect the capacitance of the capacitors. Therefore, the capacitor bank may result in no significant phase-noise degradation caused by frequency modulation (FM). However, a high quality factor (Q) is difficult to achieve in the capacitor bank of FIG. 1 because of the on-resistance of switches S1 to Sn that are serially connected to the MIM capacitors C1 to Cn. That is, when the voltage-controlled oscillator is designed for low noise and wide bandwidth environment, the MIM capacitor bank may not be used in the voltage-controlled oscillator.
To overcome the above disadvantages, a conventional capacitor bank employs NMOS varactors or PMOS varactors instead of the MIM capacitors, thus, removing the need for the switches. The conventional capacitor bank has a serial resistance that is lower than that of the capacitor bank of FIG. 1, and therefore, the conventional capacitor bank is suitable for low noise voltage-controlled oscillator.
FIG. 2 is a schematic view illustrating an NMOS varactor, a PMOS varactor and respective capacitance characteristics thereof.
As shown in FIG. 2, the capacitance of the metal oxide semiconductor (MOS) capacitor is a function of a voltage between both ends of the MOS capacitor, and thus the capacitance may be changed by common noise to generate the FM modulation. Additionally, phase noise degradation may be generated by the FM modulation. FIG. 2 shows variation of the capacitances of the NMOS varactor and the PMOS varactor. The MOS varactor is turned on or off by a gate-to-source voltage of the NMOS transistor or PMOS transistor while the source and drain is electrically shorted.
FIG. 3 is a cross-sectional view illustrating a structure of a conventional AMOS varactor.
The structure of the conventional AMOS varactor is disclosed in U.S. Pat. No. 6,211,745. The AMOS varactor of FIG. 3 may have a P-type gate formed on an N-type well (hereinafter, referred to as a P-GATE/N-WELL structure) or an N-type gate formed on a P-type well (hereinafter, referred to as an N-GATE/P-WELL structure).
When the varactor has the P-GATE/N-WELL structure, a source region 124 and a drain region 122 of the varactor have N+ types and a well 120 of the varactor has an N− type. Additionally, a gate polysilicon 134 of the P type gate has a P+ type and contacts 126 and 128 are composed of metal. When the varactor has the N-GATE/P-WELL structure, the source region 124 and the drain region 122 have the P+ types and the well 120 has a P− type. Additionally, the gate polysilicon 134 has the N+ types and the contacts 126 and 128 are composed of metal.
FIG. 4 is a schematic view illustrating characteristics of the conventional AMOS varactor in FIG. 3. Referring to FIG. 4, compared with the NMOS varactor or the PMOS varactor shown in FIG. 2, the capacitance of the AMOS varactor is substantially constant near the transition region of the capacitance.
FIG. 5 is a circuit diagram illustrating a conventional capacitor in a differential mode using the AMOS varactor in FIG. 3, which is disclosed in U.S. Pat. No. 6,211,745. Referring to FIG. 5, the conventional capacitor is implemented in a differential mode to have digitally controlled capacitance values of the AMOS varactors. For example, as shown in FIG. 5, a control signal B1 is applied to a node where a capacitor C11 and a capacitor C21 are coupled to each other and the capacitances of the AMOS varactors have binary coded value from a least significant bit (LSB) (or smallest) capacitance to a most significant bit (MSB) (or largest) capacitance. In other words, when the capacitor C11 of the AMOS varactors (C11 to C1n) is designated as a LSB capacitor having capacitance of C, a capacitor C11 has capacitance of 21×C, and a capacitor C1n, i.e., the MSB capacitor, has capacitance of 2(n-1)×C. Similarly, when the capacitor C21 of the AMOS varactors (C21 to C2n) is designated as the LSB capacitor having capacitance of C, a capacitor C21 has capacitance of 21×C and a capacitor C2n, i.e., the MSB capacitor, has capacitance of 2(n-1)×C. Therefore, the AMOS varactor composing the capacitor bank is called a binary capacitor.
However, in the conventional capacitor bank in FIG. 5, capacitance values of the AMOS varactors C11 to C1n and C21 to C2n vary with a DC voltage at a terminal A 501 or a terminal B 503. Therefore, when common noise is introduced into the DC voltage at the terminal A 501 or terminal B of the capacitor bank, phase noise degradation due to FM modulation may occur.
Therefore, there exists a need for a capacitor bank, which can avoid the phase noise degradation due to FM modulation when common noise is introduced to the DC voltage of the oscillation node of the capacitor bank.